An amplifier designed by Michael Bittner from Gutersloh, Germany. Here
you can download schematics, components layout and PCB artwork.
The original Michael's webpage can be seen here:
I took a part in evaluation of this project, kindly invited by Carlos Mergulhao from Brazil. Here you can see technology files and results of evaluation.
1) Schematics, layout and PCB in low resolution
2) PCB component side and solder side in 300 dpi resolution, blue color for solder side and red color for component side
3) PCB solder side in 300 dpi resolution, black
and white, to print a film foil
The symasym evaluation story
First of all I slightly modified original Michael's PCB (it can be seen on this page) and purchased production of 4 PCBs. Here is the produced PCB and here you can see partly assembled board.
On 27-10-2005 I got everything prepared and decided to start evaluation. Unfortunately I have got fever, so my effort is reduced to some 20%. But I promised to test this weekend, so I must do it.
I drilled the necessary holes to my evaluation Fischer Elektronik SKE 3 400 heatsinks and casework. Placed the PCB and transistors and thought about connecting to power supply. Forgot to insert insulation plastic pads between screw head and body of 15030/15031, fortunately measured short-cirduit to heatsink and fixed the problem. Then I inserted 3 Ohm resistors into +Vs and -Vs supply rails, one never knows. I turned on the power supply and measured 3V voltage drop across 3 Ohm resistors - i.e. 1 Amp quiescent current. Not very good, quickly turn the bias trimpot to reverse position, Pavel ;-). Well - everything is OK, low DC offset, Iq of output pair about 60mA. Everythings seems to be OK. Turn on the scope and check output voltage - oh wow! There are severe oscillations of some 6.6 MHz at the output. What can it be? - certainly, the bias current!! This bloody Gm doubling of class AB stages, I hate it ;). Started to lower the Iq, and oscillations suddenly completely disappeared, at some 55mA (difficult to measure, the trimpot is a bit sensitive). So I decided to choose a good safety margin and setup the Iq of output transistors to 23 mA. Everything is stable (no trace of oscillations) and step-response is perfect. Is there time now to remove 3 Ohm resistors from supply rails? ;)
Here is my testup fixture.
I have to add that my output devices are Toshiba 2SC5200/2SA1943, only for them I found oscillations, I know nothing about behaviour with original MJL3281/1302 and I believe there will be no problem. So, I removed the 3 Ohm rail resistors. Finally, after very long and severe tests, I had to decrease Iq of output pair to 10mA to assure unconditional stability, even for capacitive load 1500pF, and for my dummy speaker load . I performed 3 hour lasting 50% output power test to dummy load, under conditions of most power dissipated in output devices. As I have very good heatsinks, they even did not get warm. Many commercial amps fail in this test. When I performed longterm square wave test (10kHz 20Vp-p) into the dummy load, I succeeded to destroy that dummy load. The C4 capacitor (2.2 uF, MKT foil, rated at 100 V) did not withtstand steep currents and exploded. But Symasym survived without any problem.
But Iq = 10mA means a little bit underbiased class B output stage. Now the goal is to modify LG (loop gain) characteristics to be able to set higher Iq.
I finally got it
The problem is the feedback capacitor 22pF. The unlimited feedback capacitor may be used only for circuits stable at gain = 0dB. Completely removed the 22pF and circuit is stable now. The question is if to try lower value of Cfb or better Cfb in series with a resistor.
I played with feedback capacitor value and as a result for Toshiba
2SC5200/2SA1943 output devices I recommend the value 3.3pF instead
of original 22pF, that is valid for MJL3281/1302 (according to Michael
For 3.3pF cap, the Iq can be increased to desired value, maybe 30 - 40mA. The amp does not oscillate at any Iq with 3.3pF feedback capacitor.
Bode Analysis of Symasym
To show the problem, let's speak about Bode plots for a while. For feedback amplifier, following equation is valid:
Vout / Vin = Aol / (1 + Aol * ß)
Aol .... open loop gain (frequency dependent)
ß .... feedback factor (feedback divider, may be frequency dependent, if feedback capacitor used)
Aol * ß ..... loop gain (frequency dependent)
The feedback amplifier is unstable, if loop gain Aol * ß = - 1, i.e. /1/ < -180°, i.e. in log scale for frequency where loop gain = 0 dB the phase angle must be between 0° and -180°, for -180° amp starts to oscillate.
Let's show Bode plots for symasym. The crucial
is loop gain, the red curve. Frequency where loop gain = 0 dB is about
1.4MHz. At this frequency the phase angle is about -124°, so the phase
margin is about 56° (the rest to -180°). This is for feedback cap
3.3pF. If there was no feedback capacitor, the loop gain phase would follow
the blue curve and phase margin would be too low. For feedback capacitor
of some 30 pF there is no phase margin and amp oscillates. So the choice
of right value of feedback cap is crucial.
My final modified schematics shows only values of modified components. With this circuit, I will start distortion measurements and listening tests. The quiescent current was finally set at 150 mA, as a result of distortion measurements